Electrical circuits typically are comprised of linear circuit elements, such as resistors, inductors, and capacitors as well as non-linear circuit elements, such as transistors and power sources. In the process of designing circuits, particularly large scale integrated circuits, it is normal practice to mathematically model the circuit. Particularly, the outputs of the circuit are modeled as a function of the inputs to the circuit. The mathematical model is used to determine various response characteristics of the circuit.
In our prior patent applications, application Ser. No. 08/269,230, filed Jun. 30, 1994, now U.S. Pat. No. 5,537,329 and application Ser. No. 08/489,270, filed Jun. 9, 1995, now U.S. Pat. No. 5,689,685, both of which are incorporated herein by reference, we disclosed new methods and apparatus for modeling linear subcircuits within a larger electrical circuit.
An electrical circuit, such as an integrated circuit, frequently contains large portions thereof comprised entirely of linear circuit elements. For instance, a wire or other connector usually can be modeled as a network of resistances and capacitances. Accordingly, the entire interconnect structure between a last non-linear circuit element in an integrated circuit and the end of a package pin can be mathematically modeled as a linear subcircuit.
The modeling of the larger overall circuit can be extremely complex in large scale integrated (LSI) circuits and very large scale integrated (VLSI) circuits. Our aforementioned patent application Ser. No. 08/489,270 discloses a technique for modeling the linear subcircuit portions within the larger circuit by a greatly reduced matrix compared to the original matrix equation for the linear subcircuit.
More specifically, each connection point of a linear subcircuit to elements outside of the bounds of the linear subcircuit is modeled as both an input and an output in a matrix formula for the linear subcircuit. Accordingly, a linear subcircuit having p electrical connection points to circuitry outside of the bounds of the linear subcircuit is modeled using a p by p matrix function.
Referring to our aforementioned patent applications, in U.S. patent application Ser. No. 08/269,230, we disclosed a Pade via Lanczos method for determining a scalar Pade approximant of a transfer function of a linear circuit for use in determining, with substantial accuracy, the frequency response behavior of the linear circuit.
In U.S. patent application Ser. No. 08/489,270, we disclosed an extension to the previous application in which the Pade via Lanczos method was extended to matrix transfer functions. More specifically, U.S. patent application Ser. No. 08/489,270 discloses a numerically stable method to determine a matrix Pade approximation of the frequency response of a linear circuit or subcircuit with little numerical degradation, and providing an acceptable computational cost per order of approximation. The method reduces the very large matrices used to represent the p by p matrix transfer function to a pair of much smaller matrices so that the resulting approximate matrix transfer function has basically the same characteristics as the original matrix transfer function. Using the method and apparatus disclosed therein, the original matrix can be reduced to any particular size desired. The accuracy of the approximation depends on the order of reduction in size of the matrices. Generally, the matrices can be reduced to a very large extent without significant decrease in accuracy.
One potential application for the reduction methods disclosed in the aforementioned patent applications is use on one or more linear subcircuits in a larger circuit. In such an application, the reduced equations can be inserted into the equation for the larger overall circuit, thus greatly reducing the complexity of the mathematical model for the overall non-linear circuit. While such application of these techniques can greatly simplify analysis of the larger non-linear circuit, the reductions still may remain very complex and be very time consuming in themselves. Accordingly, it is desireable to further reduce the complexity of the procedure for generating reduced-order circuit models to whatever extent possible in order to minimize the required processing power and/or time. Also, there is an ever-present drive to increase the accuracy of the models.
Therefore, it is an object of the present invention to provide an improved method and apparatus for generating a reduced order matrix approximant of the transfer function associated with a passive circuit.